What Is NOR Flash? Non-Volatile Memory Glossary
What Is NOR Flash? Non-Volatile Memory Glossary
NOR Flash is a type of non-volatile storage memory that retains data without power. It was invented by Dr. Fujio Masuoka at Toshiba in 1984 and named for its NOR-gate logic structure. Unlike NAND Flash, NOR Flash provides random byte/word access similar to RAM, allowing the CPU to read and execute code directly from the flash chip \u2014 a capability known as execute-in-place (XIP).
NOR Flash is the preferred memory technology for boot code, firmware, and configuration storage in embedded and industrial systems where reliability, fast random reads, and instant code execution are critical. It is widely used in PLCs, industrial PCs, routers, IoT devices, automotive ECUs, and FPGA configuration storage.
Key Characteristics
| Feature | Description |
|---|---|
| Random access | Like RAM, any byte or word can be read directly by the CPU. No need to load code into RAM first. |
| XIP (Execute-in-Place) | Code stored in NOR Flash can be executed directly at its storage address, reducing boot time and RAM requirements. |
| High read speed | Read access time is typically ~100 ns, comparable to legacy SRAM speeds. |
| Slow write/erase | Programming (write) is slow (\u00b5s\u2013ms per word), and erasing a sector takes 100 ms\u20132 s. |
| Byte-level program | Unlike NAND (page-based), NOR Flash can be programmed one word or byte at a time. |
| High reliability | No bad blocks, no ECC required for most applications. Excellent data retention (10\u201320 years). |
| Lower density, higher cost | NOR Flash typically tops out at ~2 Gb per die, with higher cost per bit than NAND Flash. |
NOR vs. NAND: When to Use Each
| Selection Factor | Choose NOR Flash | Choose NAND Flash |
|---|---|---|
| Boot / firmware storage | \u2705 NOR supports XIP \u2014 CPU boots directly from flash | NAND cannot XIP; requires boot ROM to copy code to RAM |
| Code size | Small to medium (KB\u2013tens of MB) | Large (hundreds of MB\u2013GB) |
| Random read performance | Excellent (~100 ns) | Poor (\u00b5s level, page buffered) |
| Data storage density | Low (costly at high density) | High (lowest cost per bit) |
| Reliability requirements | Extreme \u2014 NOR has no bad blocks | NAND requires ECC and bad block management |
| Interface types | Parallel (x8/x16) or SPI/QSPI | ONFI / Toggle / SPI (for SPI NAND) |
Interface Types
NOR Flash is available in two major interface families:
- Parallel NOR: Uses a full parallel address/data bus (x8 or x16). Provides the fastest random read access but requires more PCB pins. Common in older and high-end industrial designs. Example: Intel \u201cStrataFlash\u201d, Micron Numonyx.
- SPI / QSPI NOR: Uses a serial peripheral interface with fewer pins. Modern QSPI (Quad SPI) NOR Flash achieves high read throughput via 4-bit data lines while keeping pin count low. The dominant NOR interface for new designs. Example: Winbond W25Q series, Macronix MX25 series.
For a practical integration guide, see NOR Flash for Boot and Firmware Storage in Industrial Devices.
Related Terms
| Term | Description |
|---|---|
| NAND Flash | Non-volatile memory organized in pages/blocks. Higher density, lower cost per bit, but requires a controller or FTL for management. Complements NOR as high-capacity data storage. |
| XIP (Execute-in-Place) | A CPU execution model where code is executed directly from the storage device without copying to RAM first. NOR Flash is the only widely used non-volatile memory that supports XIP. |
| SPI (Serial Peripheral Interface) | A synchronous serial communication interface using 4 wires (SCK, MOSI, MISO, CS). QSPI extends this with 4 data lines for higher throughput. |
| EEPROM | Byte-erasable non-volatile memory, commonly used for small configuration data. Slower and lower density than NOR, but supports individual byte erase without sector erase. |
| Boot ROM / Bootloader | The first code executed when a system powers on. NOR Flash is the traditional medium for boot ROM because of its XIP capability and high reliability. |
| FPGA Configuration | FPGAs often load their configuration bitstream from NOR Flash on power-up, relying on NOR\u2019s deterministic read timing and XIP-like behavior. |
By Loongtion Technical Team
Related resources
Continue with related selection guides and notes for the same industrial storage topic.