What Is NAND Flash? Non-Volatile Memory Glossary

NAND Flash is a type of non-volatile storage memory that retains data without power. It was invented by Dr. Fujio Masuoka at Toshiba in 1987 and named for its logic-gate structure (NOT-AND). Unlike NOR Flash, which allows random byte access, NAND Flash uses a series-connected cell architecture that must be accessed in pages (typically 4 KB–16 KB) and erased in larger blocks (typically 256 KB–4 MB). This trade-off delivers significantly higher density, faster write/erase speeds, and lower cost per bit — making NAND Flash the dominant storage medium for SSDs, eMMC, UFS, SD cards, and USB drives in both consumer and industrial applications.

In the memory-storage hierarchy, NAND Flash occupies the critical layer between volatile DRAM (fast, expensive) and mechanical HDDs (slow, cheap), enabling persistent storage with near-DRAM performance in modern systems. Its key characteristics include:

Non-volatile: Data is retained for years without power
Page/block access: Read and write at page granularity; erase at block granularity
Asymmetric operations: Reads are fast (~25–100 µs), writes are slower (~200–2,500 µs)
Finite endurance: Each erase-write cycle wears out the oxide layer
Needs management: Requires a controller or FTL for wear leveling, bad block management, and ECC

NAND Flash Types: SLC, MLC, TLC, QLC

NAND Flash cells are classified by the number of bits stored per cell. Higher bit-per-cell counts increase density and lower cost but reduce performance, endurance, and reliability — critical factors for industrial storage selection.

Feature	SLC	MLC	TLC	QLC
Bits per cell	1	2	3	4
P/E cycles	~100,000	~3,000–10,000	~500–3,000	~100–1,000
Read latency	~25 µs	~50 µs	~75 µs	~100+ µs
Write latency	200–300 µs	600–900 µs	900–1,500 µs	1,500–2,500 µs
Cost per GB	Highest	High	Medium	Lowest
Typical use	Industrial, military SSD	Enterprise SSD	Consumer SSD	Cold archive

Related Terms

Term	Description
NOR Flash	Non-volatile memory with random byte access, faster reads, lower density. Used for firmware/boot where XIP is needed.
FTL (Flash Translation Layer)	Firmware that maps logical addresses to physical NAND pages; handles GC, wear leveling, bad block remapping.
Wear Leveling	FTL algorithm distributing P/E cycles evenly across blocks to maximize lifespan.
ECC	Error Correction Codes (BCH, LDPC) that detect and fix bit errors from read/program disturb and data retention loss.
3D NAND	NAND with vertically stacked memory cells (64L–232L+), the dominant technology since ~2016.
pSLC	MLC/TLC NAND run in 1-bit-per-cell mode, trading capacity for 10–100× better endurance.

By Loongtion Technical Team

What Is NAND Flash? Non-Volatile Memory Glossary