What Is 3D NAND? Non-Volatile Memory Glossary
What Is 3D NAND? Non-Volatile Memory Glossary
3D NAND (also called V-NAND or Vertical NAND) is a flash memory architecture in which memory cells are stacked vertically in multiple layers on a single die, instead of being laid out side-by-side on a planar (2D) surface. By going vertical, 3D NAND achieves significantly higher storage density without shrinking the dimensions of the individual memory cell \u2014 avoiding the physical scaling limits and reliability penalties that plagued planar NAND at advanced lithography nodes.
First commercialized by Samsung in 2013 (24-layer V-NAND), 3D NAND has become the dominant NAND Flash technology since approximately 2016. Current generation products routinely ship with 176, 232, or more than 300 layers, with 500+ layer architectures on industry roadmaps.
How It Works
3D NAND builds storage layers by depositing alternating layers of conductor (word line) and insulator materials, then etching vertical channels (holes) through the stack. Each intersection of a vertical channel and a word line forms a charge-trap memory cell. The key structural types include:
- TCAT (Terabit Cell Array Transistor) \u2014 Samsung\u2019s architecture using a gate-all-around structure
- BiCS (Bit Cost Scalable) \u2014 Kioxia/Western Digital\u2019s architecture
- CMOS-under-Array (CuA) \u2014 placing peripheral circuits under the memory array to reduce die size
Advantages Over Planar (2D) NAND
| Advantage | Why It Matters for Industrial Storage |
|---|---|
| Higher density | More storage in the same footprint enables smaller SSDs and higher-capacity embedded storage |
| Better endurance | Larger, more reliable cells (less cell-to-cell interference) improve P/E cycle counts at the same bit-per-cell level |
| Lower cost per bit | Stacking layers is more cost-effective than shrinking the lithography node |
| Reduced power | Lower operating voltages than advanced planar nodes |
| Faster program/erase | Thinner tunnel oxide and improved charge-trap designs |
| Improved data retention | Larger charge storage volume reduces charge loss over time |
3D NAND in Industrial Products
All modern Loongtion industrial SSDs and eMMC products use 3D NAND Flash. The transition from planar to 3D NAND has been particularly beneficial for industrial storage because:
- TLC 3D NAND can achieve endurance levels that previously required planar MLC, enabling higher capacities at industrial reliability standards.
- pSLC mode on 3D TLC NAND delivers exceptional endurance (10\u2013100\u00d7 improvement over native TLC), ideal for write-intensive industrial logging.
- Wide-temperature 3D NAND (-40\u00b0C to +85\u00b0C) is available in Loongtion\u2019s industrial M.2 NVMe SSDs, NVMe BGA SSDs, and industrial eMMC.
For a deeper look at NAND Flash fundamentals, see the NAND Flash glossary.
Layer Count Evolution
| Generation | Typical Layers | Representative Products | Year |
|---|---|---|---|
| 1st | 24\u201332 | Samsung V-NAND (24L) | 2013 |
| 2nd\u20133rd | 32\u201348 | Samsung, Toshiba, Micron | 2014\u20132015 |
| 4th\u20135th | 64\u201372 | Widespread adoption | 2016\u20132017 |
| 6th\u20137th | 96\u2013128 | High-capacity enterprise SSDs | 2018\u20132020 |
| 8th\u20139th | 176\u2013232 | Current mainstream | 2021\u20132024 |
| 10th+ | 300+ | On roadmap | 2025+ |
Related Terms
| Term | Description |
|---|---|
| NAND Flash | Non-volatile memory that stores data in floating-gate or charge-trap cells. The base technology that 3D NAND vertically extends. |
| Planar NAND (2D NAND) | Traditional NAND Flash where cells are laid out side-by-side on a single plane. Scaling limits drove the industry to 3D. |
| Charge Trap Cell (CTC) | A memory cell type that traps charge in a silicon nitride layer (vs. floating-gate). Dominant in modern 3D NAND due to better scalability. |
| CMOS Under Array (CuA) | A 3D NAND design where peripheral circuits are placed under the memory array, reducing die area and cost. |
| pSLC (pseudo-SLC) | Running TLC or MLC NAND in 1-bit-per-cell mode. On 3D TLC NAND, pSLC mode can deliver 50,000\u2013100,000 P/E cycles. |
| FTL (Flash Translation Layer) | Firmware managing address mapping, wear leveling and GC critical to maximizing 3D NAND endurance in industrial SSDs. |
By Loongtion Technical Team
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