Technical resources

Browse free whitepapers (with PDF download), selection guides, application notes, Q&A, and glossary entries for industrial DRAM, SSD, card, and module design-in. Use them to shortlist SKUs, check temperature and interface fit, and brief your BOM review — product catalog PDFs are on the Downloads page.

Q&A · DDR Memory

Q&A

What Is the Difference Between Industrial and Commercial Temperature…

Industrial temperature memory (-40°C to +85°C) is tested and guaranteed to operate in extreme environments where commercial-grade (0°C to +70°C) memory wou…

Q&A

What are the guidelines for trace impedance (e.g., 40Ω or 50Ω) for D…

What are the guidelines for trace impedance (e.g., 40Ω or 50Ω) for DDR3 signals and the required trace width for a given stack-up?The Loongtion DDR3 SDRAM…

Q&A

Is it acceptable to use through vias instead of blind or backdrilled…

Is it acceptable to use through vias instead of blind or backdrilled vias for DDR3 routing to reduce PCB costs?Routing DDR3 memory interfaces is a balance…

Q&A

How do I compensate for an unbalanced number of vias in DDR3 routing…

How do I compensate for an unbalanced number of vias in DDR3 routing, and what are the signal integrity implications?Unbalanced via count on a DDR3 data or…

Q&A

Why Does DDR3 Memory Have a BGA Footprint with Two Columns of Pads a…

What is the reasoning behind the unique BGA footprint of DDR3 memory packages, with two columns of pads and an empty column in between?The distinctive BGA…

Q&A

Can I swap data wires (e.g., connect DQ0 on the CPU to DQ1 on the me…

Can I swap data wires (e.g., connect DQ0 on the CPU to DQ1 on the memory) on the data bus between the CPU and a DDR3 x16 memory for routing optimization?Ye…

Q&A

For DDR3 layout, what is the acceptable skew tolerance (e.g., 25 mil…

For DDR3 layout, what is the acceptable skew tolerance (e.g., 25 mils) within a net class, and does the reset line require length matching?When designing a…

Q&A

How do I properly length-match the different signal classes (address…

How do I properly length-match the different signal classes (address/command/clock vs. DQ/DM/DQS) for DDR3 routing?Proper length matching ensures that all…

Q&A

What are the minimum number of PCB layers required for proper DDR3 f…

What are the minimum number of PCB layers required for proper DDR3 fanout and routing to keep costs down?When designing a cost-optimized system with DDR3 m…